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I've run into an issue that I could use some help with (thanks for everyone's help so far, btw).
A couple of users on AtariAge are reporting that the options in the boot menu (START key) don't save. Specifically, they don't survive cold reset or restarting the emulator. I've instrumented the emulation a bit with the v0.6 firmware and I can't figure out where these would be saved -- there don't seem to be any writes to flash or to the RTC. The specs don't seem to indicate battery backed up SRAM, just regular CMOS static RAM. Where do these settings get saved, or do they get saved in nonvolatile storage at all?
drac030 napisał/a:"RTC read only" oznacza, że czasu nie można przestawić, czy że NV-RAM też jest "NV-ROM-em"? ;)
It is magic. :)
The clock itself is read only and function $F (Copy_clock_to_RAM) always returns the system time in the local time zone. Writing $E (Copy_RAM_to_clock) has no effect. However, RAM addresses $0 and $2-$9 are read/write. The frequency measurement and test modes in register $0 are also not currently implemented.
This version supports version 2 (IDEPlus 2.0):
http://www.virtualdub.org/beta/Altirra-2.00-test8.zip
http://www.virtualdub.org/beta/Altirra- … t8-src.zip
Notes:
6K should have been 3K; I only had some old information about a two-bank scheme. This version implements 1.5K (1 bank) for v1 and 96K (64 banks) for v2.
The v2.0 RTC is emulated (read only).
The SHIFT key to disable the interface will not work by default. This is to avoid it being detected on Shift+F5 (cold reset). To enable this, go to Input > Keyboard and toggle the "Allow SHIFT key to be detected on reset" option.
There is a placeholder BIOS ROM that activates to tell the user that a real ROM is needed. I had to disable this for IDEPlus 2.0 because the LBA0.COM flasher won't run if it can't recognize the ROM image. It does run if the ROM is empty.
If you run the flasher, use File > Save Firmware > Save KMK/JZ IDE Main/SDX Flash to save it.
The emulated IDEPlus 2.0 interface has an Am29F010 flash chip (1Mbit) for the main BIOS and Am29F040B (4Mbit) for SpartaDOS X.
I noticed that the flashers use indexed writes with the flash (STA (zp),Y). This causes false reads from the flash hardware during writes. It's probably OK, but a bit weird.
Ah, thanks for retesting. I had accidentally produced a extra opcode from the code generator for the basic test ($89 "STA #imm") that aliased the BIT #imm opcode in the 65C02/65C816, causing a failure on those CPUs.
This version should have the POKEY init test relaxed and the 'C02/'816 insn bug fixed:
http://www.virtualdub.org/beta/Acid800-0.81.7z
At least one of the other failures are likely 65C816 related to my use of INC WSYNC. I'll have to see if I can replace the remaining uses, but it's hard (it's so convenient).
Machine sensitive timing I didn't catch with my 130XE -- the test is expecting $1E. I'll modify the test to allow the one cycle variance here (I already did so for the 15KHz clock, which I did see).
Thanks, I've received it and sent you a reply.
Sorry for replying in English, but I don't know the Polish language.
I don't think I've gotten an email from any of you recently, at least in the last couple of weeks. If you've tried to send something recently, please try to resend, and if you're continuing a discussion from a board, let me know your alias so I recognize you. Alternatively, you can also send me a PM on the AtariAge forums. My email isn't the most reliable for various reasons.
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